(abbreviated from Serial ATA Express and sometimes unofficially shortened to SATAe) is a computer bus interface that supports both Serial ATA (SATA) and PCI Express (PCIe) storage devices, initially standardized in the SATA 3.2 specification. The SATA Express connector used on the host side is backward compatible with the standard 3.5-inch SATA data connector, while it also provides two PCI Express lanes as a pure PCI Express connection to the storage device.
Instead of continuing with the SATA interface’s usual approach of doubling its native speed with each major version, SATA 3.2 specification included the PCI Express bus for achieving data transfer speeds greater than the SATA 3.0 speed limit of 6 Gbit/s. Designers of the SATA interface concluded that doubling the native SATA speed would take too much time to catch up with the advancements in solid-state drive (SSD) technology, would require too many changes to the SATA standard, and would result in a much greater power consumption compared with the existing PCI Express bus. As a widely adopted computer bus, PCI Express provides sufficient bandwidth while allowing easy scaling up by using faster or additional lanes.
In addition to supporting legacy Advanced Host Controller Interface (AHCI) at the logical interface level, SATA Express also supports NVM Express (NVMe) as the logical device interface for attached PCI Express storage devices. While the support for AHCI ensures software-level backward compatibility with legacy SATA devices and legacy operating systems, NVM Express is designed to fully utilize high-speed PCI Express storage devices by leveraging their capability of executing many I/O operations in parallel.
A high-level overview of the SATA Express software architecture, which supports both legacy SATA and PCI Express storage devices, with AHCI and NVMe as the logical device interfaces.:4
SATA Express interface supports both PCI Express and SATA storage devices by exposing two PCI Express 2.0 or 3.0 lanes and two SATA 3.0 (6 Gbit/s) ports through the same host-side SATA Express connector. Exposed PCI Express lanes provide a pure PCI Express connection between the host and storage device, with no additional layers of bus abstraction. The SATA revision 3.2 specification, in its gold revision as of August 2013, standardizes the SATA Express and specifies its hardware layout and electrical parameters.
The choice of PCI Express also enables scaling up the performance of SATA Express interface by using multiple lanes and different versions of PCI Express. In more detail, using two PCI Express 2.0 lanes provides a total bandwidth of 1 GB/s (2 × 5 GT/s raw data rate and 8b/10b encoding, equating to effective 1000 MB/s), while using two PCI Express 3.0 lanes provides close to 2 GB/s (2 × 8 GT/s raw data rate and 128b/130b encoding, equating to effective 1969 MB/s). In comparison, the 6 Gbit/s raw bandwidth of SATA 3.0 equates effectively to 0.6 GB/s due to the overhead introduced by 8b/10b encoding.
There are three options available for the logical device interfaces and command sets used for interfacing with storage devices connected to a SATA Express controller:
Used for backward compatibility with legacy SATA devices, and interfaced through the AHCI driver and legacy SATA 3.0 (6 Gbit/s) ports provided by a SATA Express controller.
PCI Express using AHCI
Used for PCI Express SSDs and interfaced through the AHCI driver and provided PCI Express lanes, providing backward compatibility with widespread SATA support in operating systems at the cost of not delivering optimal performance by using AHCI for accessing PCI Express SSDs. AHCI was developed back at the time when the purpose of a host bus adapter (HBA) in a system was to connect the CPU/memory subsystem with a much slower storage subsystem based on rotating magnetic media; as a result, AHCI has some inherent inefficiencies when applied to SSD devices, which behave much more like DRAM than like spinning media.
PCI Express using NVMe
Used for PCI Express SSDs and interfaced through the NVMe driver and provided PCI Express lanes, as a high-performance and scalable host controller interface designed and optimized especially for interfacing with PCI Express SSDs. NVMe has been designed from the ground up, capitalizing on the low latency and parallelism of PCI Express SSDs, and complementing the parallelism of contemporary CPUs, platforms and applications. At a high level, primary advantages of NVMe over AHCI relate to NVMe’s ability to exploit parallelism in host hardware and software, based on its design advantages that include data transfers with fewer stages, greater depth of command queues, and more efficient interrupt processing.